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      LPC2138FBD64/01,15 托盤 NXP(恩智浦)

      價格:1.20元/pcs起訂:1 pcs供貨總量:99999 pcs

      • 產品品牌:NXP
      • 發貨期限:自買家付款之日起 3 天內發貨
      • 所在地:廣東 深圳
      • 最后更新:2019-09-18 10:54
      • 被瀏覽:5 人次

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      LPC2138FBD64/01,15 托盤 NXP(恩智浦)

      STM32F103RCT6/STM32F103RCT6

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      【產品參數】

      • 品牌:NXP
      •  

      【詳細描述】

       Support for RS-485/9-bit mode allows both software address detection and automatic
      address detection using 9-bit mode.
      The UART includes a fractional baud rate generator. Standard baud rates such as
      115200 Bd can be achieved with any crystal frequency above 2 MHz.
      7.8.1 Features
      Maximum UART data bit rate of 3.125 MBit/s.
      16 Byte Receive and Transmit FIFOs.
      Register locations conform to 16C550 industry standard.
      Receiver FIFO trigger points at 1 B, 4 B, 8 B, and 14 B.
      Built-in fractional baud rate generator covering wide range of baud rates without a
      need for external crystals of particular values.
      FIFO control mechanism that enables software flow control implementation.
      Support for RS-485/9-bit mode.
      Support for modem control.
      7.9 SPI serial I/O controller
      The LPC1111/12/13/14 contain two SPI controllers on the LQFP48/PLCC44 packages
      and one SPI controller on the HVQFN33 packages (SPI0). Both SPI controllers support
      SSP features.
      The SPI controller is capable of operation on a SSP, 4-wire SSI, or Microwire bus. It can
      interact with multiple masters and slaves on the bus. only a single master and a single
      slave can communicate on the bus during a given data transfer. The SPI supports full
      duplex transfers, with frames of 4 bits to 16 bits of data flowing from the master to the
      slave and from the slave to the master. In practice, often only one of these data flows
      carries meaningful data.
      7.9.1 Features
      Maximum SPI speed of 25 Mbit/s (master) or 4.17 Mbit/s (slave) (in SSP mode)
      Compatible with Motorola SPI, 4-wire Texas Instruments SSI, and National
      Semiconductor Microwire buses
      Synchronous serial communication
      Master or slave operation
      8-frame FIFOs for both transmit and receive
      4-bit to 16-bit frame
      7.10 I
      2
      C-bus serial I/O controller
      The LPC1111/12/13/14 contain one I
      2
      C-bus controller.
      The I
      2
      C-bus is bidirectional for inter-IC control using only two wires: a Serial Clock Line
      (SCL) and a Serial DAta line (SDA). Each device is recognized by a unique address and
      can operate as either a receiver-only device (e.g., an LCD driver) or a transmitter with the
      capability to both receive and send information (such as memory). Transmitters and/or%{9%`HWOW)YJ`8{A@)C{PSK

      【產品圖片】

      LPC2138FBD64/01,15 托盤 NXP(恩智浦)
      LPC2138FBD64/01,15 托盤 NXP(恩智浦)效果圖(1)
      LPC2138FBD64/01,15 托盤 NXP(恩智浦)
      LPC2138FBD64/01,15 托盤 NXP(恩智浦)效果圖(2)
      LPC2138FBD64/01,15 托盤 NXP(恩智浦)
      LPC2138FBD64/01,15 托盤 NXP(恩智浦)效果圖(3)

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